Digital Logic
Digital Logic Learning Resources
All study materials, past questions and viva prep in one place.
Digital Systems, Binary numbers, Number base conversion, Octal and hexadecimal numbers,
Basic and Axiomatic definitions of Boolean algebra, Basic Theorems and properties of Boolean
K-map, Two and Three variable maps, Four variable maps, product of sum simplification,
Design Procedure, Adders, Subtractors, Code Conversions, Analysis Procedure, Multilevel
Binary Parallel Adder and Subtractor, Decimal Adder, Magnitude Comparator, Decoders and
Flip-Flops, Triggering of flip-flops, Analysis of clocked sequential circuits, Design with state
Registers, Shift registers, Ripple Counters, Synchronous Counters, Timing Sequences, The
Course Syllabus
Digital Logic — Official Curriculum
Course Description:
This course covers the concepts of digital logic and switching networks. The course includes the fundamental concepts of boolean algebra and its application for circuit analysis, multilevel gates networks, flip-lops, counters logic devices and synchronous and asynchronous sequential logic and digital integrated circuits.
Course Objectives:
The main objective of this course is to introduce the basic tools for the design of digital circuits and introducing methods and procedures suitable for a variety of digital design applications.
Course Contents:
Unit 1: Binary Systems (6 Hrs.)
Digital Systems, Binary numbers, Number base conversion, Octal and hexadecimal numbers, compliments, Signed Binary numbers, Decimal codes (BCD, 2 4 2 1,8 4 -2 -1,Excess 3, Gray Code), Binary Storage and Registers, Binary logic
Unit 2: Boolean algebra and Logic Gates (5 Hrs.)
Basic and Axiomatic definitions of Boolean algebra, Basic Theorems and properties of Boolean Algebra, Boolean Functions, Logic Operations, Logic Gates, Integrated Circuits
Unit 3: Simplification of Boolean Functions (5 Hrs.)
K-map, Two and Three variable maps, Four variable maps, product of sum simplification, NAND and NOR implementation, Don’t Care conditions, Determinant and selection of Prime Implicants
Unit 4: Combinational Logic (5 Hrs.)
Design Procedure, Adders, Subtractors, Code Conversions, Analysis Procedure, Multilevel NAND and NOR Circuits, Exclusive-OR Circuits
Unit 5: Combinational Logic with MSI and LSI (8 Hrs.)
Binary Parallel Adder and Subtractor, Decimal Adder, Magnitude Comparator, Decoders and Encoders, Multiplexers, Read-only-Memory (ROM), Programmable Logic Array (PLA), Programmable Array Logic (PAL)
Unit 6: Synchronous and Asynchronous Sequential Logic (10 Hrs.)
Flip-Flops, Triggering of flip-flops, Analysis of clocked sequential circuits, Design with state equations and state reduction table, Introduction to Asynchronous circuits, Circuits with latches.
Unit 7: Registers and Counters (6 Hrs.)
Registers, Shift registers, Ripple Counters, Synchronous Counters, Timing Sequences, The memory
Laboratory Works:
Students should be able to realize following digital logic circuits as a part of laboratory work.
- Familiarizations with logic gates
- Combinatorial Circuits
- Code Converters
- Design with Multiplexers
- Adders and Subtractors
- Flip-Flops
- Sequential Circuits
- Counters
- Clock Pulse Generator
Text Books:
- M. Morris Mano, “Digital Logic & Computer Design”
Reference Books:
- Brain Holdsworth, “Digital Logic Design”, Elsevier Science.
- John Patrick Hayes, “Introduction to Digital Logic Design”, Addison-Wesley.
- M. Morris Mano and Charles Kime, “Logic and Computer Design Fundamentals”, Pearson New International.
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Text Book
Official reference book for Digital Logic
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Tribhuvan University
Institute of Science and Technology
Candidates are required to give their answers in their own words as far as practicable.
The figures in the margin indicate full marks.
SECTION A
Answer any two questions.Differentiate between synchronous and asynchronous counter. Design a 3-bit synchronous binary counter using T Flip Flop. Draw its timing diagram.
Differentiate between synchronous and asynchronous counter. Design a 3-bit synchronous binary counter using T Flip Flop. Draw its timing diagram.
Explain De-Morgan’s Law. Simplify the Boolean function F(P,Q,R,S) =Π(0,1,4,5,11,14,15) and d(P,Q,R,S) =Σ(2,3,7,8,9,13) using K-Map in both SOP and POS form.
Explain De-Morgan’s Law. Simplify the Boolean function F(P,Q,R,S) =Π(0,1,4,5,11,14,15) and d(P,Q,R,S) =Σ(2,3,7,8,9,13) using K-Map in both SOP and POS form.
Explain design procedure of combinatorial circuits. Design a combinatorial circuit with three inputs x, y, and z, and three outputs A, B, and C. When the binary input is 0, 1, 2 or 3, the binary output is one greater than the input. When the input is 4, 5, 6, or 7, the binary output is one less than the input.
Explain design procedure of combinatorial circuits. Design a combinatorial circuit with three inputs x, y, and z, and three outputs A, B, and C. When the binary input is 0, 1, 2 or 3, the binary output is one greater than the input. When the input is 4, 5, 6, or 7, the binary output is one less than the input.
SECTION B
Answer any eight questions.
Given A=46 and B=35 represent them in binary and perform A-B using 1’s complement method.
Given A=46 and B=35 represent them in binary and perform A-B using 1’s complement method.
What is Multiplexer. Design 8 to 1 Multiplexer with low level Multiplexers.
What is Multiplexer. Design 8 to 1 Multiplexer with low level Multiplexers.
Write about D flip flop with necessary circuit, block diagram, characteristic table and equation.
Write about D flip flop with necessary circuit, block diagram, characteristic table and equation.
Simplify F(A, B, C, D) = Σ(1,3,4,6,9,11,12,14) and realize the equation using NOR gates only.
Simplify F(A, B, C, D) = Σ(1,3,4,6,9,11,12,14) and realize the equation using NOR gates only.
Mention different types of shift registers. Explain SIPO with timing diagram.
Mention different types of shift registers. Explain SIPO with timing diagram.
What is decoder? Describe the 3 to 8 line decoder circuit.
What is decoder? Describe the 3 to 8 line decoder circuit.
Explain state diagram, state table, state reduction and state assignment with suitable example.
Explain state diagram, state table, state reduction and state assignment with suitable example.
Design a 2 bit asynchronous binary counter using T flip flop. Draw its timing diagram.
Design a 2 bit asynchronous binary counter using T flip flop. Draw its timing diagram.
Write short notes on:
- Encoder
- Error detection codes
Write short notes on:
- Encoder
- Error detection codes
Tribhuvan University
Institute of Science and Technology
Candidates are required to give their answers in their own words as far as practicable.
The figures in the margin indicate full marks.
SECTION A
Answer any two questions.What is combinational circuit? Design a combinational circuit with four inputs that represent a decimal digit in BCD and four output lines that generate the 1’s complement of the input binary patterns.
What is combinational circuit? Design a combinational circuit with four inputs that represent a decimal digit in BCD and four output lines that generate the 1’s complement of the input binary patterns.
What is asynchronous counter? Design asynchronous counter that counts the sequence of 0-1-4-6-7 using T flip-flop.
What is asynchronous counter? Design asynchronous counter that counts the sequence of 0-1-4-6-7 using T flip-flop.
Implement the Boolean function F(P,Q,R,S) = ∑ (3,4,6,8,9,14) using:
- 8 to 1 multiplexer
- PLA
- Decoder
Implement the Boolean function F(P,Q,R,S) = ∑ (3,4,6,8,9,14) using:
- 8 to 1 multiplexer
- PLA
- Decoder
SECTION B
Answer any eight questions.
Perform the following operations:
- (011101)2 – (110011)2 using 2’s complement
- (89344)10– – (98654)10 using 9’s complement.
Perform the following operations:
- (011101)2 – (110011)2 using 2’s complement
- (89344)10– – (98654)10 using 9’s complement.
If f(P,Q,R,S) = ∑(3,4,7,8,14) and d(P,Q,R,S) = ∑(1,6,9,13). Simplify using K-map and design the circuit using minimum number of NAND gates.
If f(P,Q,R,S) = ∑(3,4,7,8,14) and d(P,Q,R,S) = ∑(1,6,9,13). Simplify using K-map and design the circuit using minimum number of NAND gates.
What is the drawback of RS Flipflop? Explain D Flip Flop in detail with a logic diagram, characteristics table, and characteristics equation.
What is the drawback of RS Flipflop? Explain D Flip Flop in detail with a logic diagram, characteristics table, and characteristics equation.
Design a full subtractor with necessary tables and logic diagram.
Design a full subtractor with necessary tables and logic diagram.
What is shift register? Explain 4 bit SISO and PIPO with timing diagram.
What is shift register? Explain 4 bit SISO and PIPO with timing diagram.
Design an asynchronous mod 11 up counter using T flip flop.
Design an asynchronous mod 11 up counter using T flip flop.
How race condition in JK flipflop can be resolved? Explain.
How race condition in JK flipflop can be resolved? Explain.
What is decoder circuit? Design 3 to 8 decoder circuit.
What is decoder circuit? Design 3 to 8 decoder circuit.
Write short notes on:
- State Diagram
- Encoder
- Parallel Adder
Write short notes on:
- State Diagram
- Encoder
- Parallel Adder
Tribhuvan University
Institute of Science and Technology
Candidates are required to give their answers in their own words as far as practicable.
The figures in the margin indicate full marks.
SECTION A
Answer any two questions.Design the sequential circuit with respect to the following state diagram using T flip flops.
Design the sequential circuit with respect to the following state diagram using T flip flops.
Implement F = ∑(0,1,4,5,7) using
- a. Multiplexer
- b. Decoder
- c. PLA
Implement F = ∑(0,1,4,5,7) using
- a. Multiplexer
- b. Decoder
- c. PLA
Differentiate between combinational circuit and sequential circuit. Design mod-10 synchronous counter using J-K flip-flop. Show necessary truth tables and K-maps.
Differentiate between combinational circuit and sequential circuit. Design mod-10 synchronous counter using J-K flip-flop. Show necessary truth tables and K-maps.
SECTION B
Answer any eight questions.
Provide one example where shift left operator can be used. Explain serial-in-serial-out register.
Provide one example where shift left operator can be used. Explain serial-in-serial-out register.
Carry out the following tasks
- a. Perform 2’s complement subtraction of 010110 – 100101
- b. Represent decimal number 10 in its BCD form
Carry out the following tasks
- a. Perform 2’s complement subtraction of 010110 – 100101
- b. Represent decimal number 10 in its BCD form
Derive the Boolean expression for sum and carry of half adder. Draw its combinational circuit. Implement it using only NOR gates.
Derive the Boolean expression for sum and carry of half adder. Draw its combinational circuit. Implement it using only NOR gates.
Express F’ = (x + y z)’ as a sum of min-terms.
Express F’ = (x + y z)’ as a sum of min-terms.
Minimize the following Boolean function using K-map F (A, B, C, D) = ∑m(0,1,2,5,7,8,9,10,13,15)
Minimize the following Boolean function using K-map F (A, B, C, D) = ∑m(0,1,2,5,7,8,9,10,13,15)
What are the practical implications of down counter? Explain BCD ripple counter.
What are the practical implications of down counter? Explain BCD ripple counter.
Design a combinational circuit with three inputs and one output. The output is 1 when the binary value of the inputs is an even number.
Design a combinational circuit with three inputs and one output. The output is 1 when the binary value of the inputs is an even number.
Differentiate between ROM and PLA. Explain different types of ROM.
Differentiate between ROM and PLA. Explain different types of ROM.
Write short notes on (Any two)
- a. Positive Logic
- b. I2L
- c. ASCII
Write short notes on (Any two)
- a. Positive Logic
- b. I2L
- c. ASCII
Tribhuvan University
Institute of Science and Technology
Candidates are required to give their answers in their own words as far as practicable.
The figures in the margin indicate full marks.
SECTION A
Answer any two questions.Design the sequential circuit with respect to the following state diagram using J-K flip flops.
Design the sequential circuit with respect to the following state diagram using J-K flip flops.
Implement F = Σ(0, 2, 3, 4, 7) using:
- Multiplexer
- Decoder
- PLA
Implement F = Σ(0, 2, 3, 4, 7) using:
- Multiplexer
- Decoder
- PLA
Difference between synchronous and asynchronous counter. Design mode-7 synchronous counter using T-flip flop. Show necessary truth tables and k-maps.
Difference between synchronous and asynchronous counter. Design mode-7 synchronous counter using T-flip flop. Show necessary truth tables and k-maps.
SECTION B
Answer any eight questions.
Provide one example where shift right operation can be used. Explain parallel-in-parallel-out register.
Provide one example where shift right operation can be used. Explain parallel-in-parallel-out register.
Carry out the following task
- Preform 1’s complement subtraction 110101 – 100101
- Represent decimal number 0.125 into its binary form
Carry out the following task
- Preform 1’s complement subtraction 110101 – 100101
- Represent decimal number 0.125 into its binary form
Derive the Boolean expression for sum and carry of half adder. Draw its combinational circuit. Implement it using only NAND gates.
Derive the Boolean expression for sum and carry of half adder. Draw its combinational circuit. Implement it using only NAND gates.
Express the Boolean function F = x + yz as product of max-terms.
Express the Boolean function F = x + yz as product of max-terms.
Minimize the Boolean function Boolean function using K-map
F(A, B, C, D) = Σ(0, 1, 3, 5, 7, 8, 9, 11, 13, 15)
Minimize the Boolean function Boolean function using K-map
F(A, B, C, D) = Σ(0, 1, 3, 5, 7, 8, 9, 11, 13, 15)
What are the practical implementations of up counter? Explain Binary ripple counter.
What are the practical implementations of up counter? Explain Binary ripple counter.
Design a combinational circuit with three inputs and one output. The output is 1 when the binary value of the inputs is an odd number.
Design a combinational circuit with three inputs and one output. The output is 1 when the binary value of the inputs is an odd number.
Differentiate between PLA and PAL. Explain 4-bit magnitude comparator
Differentiate between PLA and PAL. Explain 4-bit magnitude comparator
Write short notes on (Any Two):
- Negative Logic
- CMOS
- EBCDIC
Write short notes on (Any Two):
- Negative Logic
- CMOS
- EBCDIC
Tribhuvan University
Institute of Science and Technology
Candidates are required to give their answers in their own words as far as practicable.
The figures in the margin indicate full marks.
SECTION A
Answer any two questions.Design a combinational circuit that generates 9’s complement of a BCD number.
Design a combinational circuit that generates 9’s complement of a BCD number.
Implement the following functions using PLA
- w (A, B, C, D) = Σ(2, 12, 13)
- x (A, B, C, D) = Σ(7, 8, 9, 10, 11, 12, 13, 14, 15)
- y (A, B, C, D) = Σ(0, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 15)
- z (A, B, C, D) = Σ(1, 2, 8, 12, 13)
Implement the following functions using PLA
- w (A, B, C, D) = Σ(2, 12, 13)
- x (A, B, C, D) = Σ(7, 8, 9, 10, 11, 12, 13, 14, 15)
- y (A, B, C, D) = Σ(0, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 15)
- z (A, B, C, D) = Σ(1, 2, 8, 12, 13)
Design sequential circuit specified by the following state diagram using T flip-flops.
Design sequential circuit specified by the following state diagram using T flip-flops.
SECTION B
Answer any eight questions.
List two major characteristics of digital computer. Represent -6 (negative six) 8 bits in signed magnitude, signed 1’s complement and signed 2’s complement respectively. Represent decimal number 4673 in a) octal and b) BCD
List two major characteristics of digital computer. Represent -6 (negative six) 8 bits in signed magnitude, signed 1’s complement and signed 2’s complement respectively. Represent decimal number 4673 in a) octal and b) BCD
Where is CMOS suitable to use? Define Power dissipation. Show that the positive logic NAND gate is a negative logic NOR gate and vice versa.
Where is CMOS suitable to use? Define Power dissipation. Show that the positive logic NAND gate is a negative logic NOR gate and vice versa.
Simplify the following function and implement them with two level NOR gate circuit, F(w, x, y, z) = wx’ + y’z’ + w’yz’.
Simplify the following function and implement them with two level NOR gate circuit, F(w, x, y, z) = wx’ + y’z’ + w’yz’.
Design a full subtractor circuit with three inputs x, y, Bin and two outputs Diff and Bout.
The circuit subtracts x − y − Bin, where Bin is the input borrow,
Bout is the output borrow, and Diff is the difference.
Design a full subtractor circuit with three inputs x, y, Bin and two outputs Diff and Bout.
The circuit subtracts x − y − Bin, where Bin is the input borrow,
Bout is the output borrow, and Diff is the difference.
Design 4-bit even parity generator.
Design 4-bit even parity generator.
What is the difference between a serial and parallel transfer? Explain how to convert serial data to parallel and parallel data to serial. What type of register is needed?
What is the difference between a serial and parallel transfer? Explain how to convert serial data to parallel and parallel data to serial. What type of register is needed?
Explain negative-edge triggered D flip flop with necessary logic diagram and truth table.
Explain negative-edge triggered D flip flop with necessary logic diagram and truth table.
Illustrate the use of Binary ripple counter and BCD ripple counter.
Illustrate the use of Binary ripple counter and BCD ripple counter.
Write Short notes on (Any two):
- RTL
- State Reduction
- POS
Write Short notes on (Any two):
- RTL
- State Reduction
- POS
Viva Questions
Click any question to reveal the answer.
What is a digital system?
What is number base conversion? Explain with example.
What are complements in binary system?
What is Boolean algebra?
Explain basic logic gates.
What is a Karnaugh Map (K-map)?
What are combinational circuits? Give examples.
What is a half adder and full adder?
What is a multiplexer?
What are flip-flops?
Differentiate between synchronous and asynchronous circuits.
What is a register?
What is a counter? Explain types.
What is ROM, PLA, and PAL?
What is Gray code and why is it used?